Vardaan Institute - Physics Worksheet (Level 0)

Topic 14.1: Energy Bands: Classification of Solids

(MCQ) In an energy band diagram, the completely or partially filled band at absolute zero temperature is called the:

(a) Conduction band

(b) Valence band

(d) Empty band

(MCQ) For an ideal insulator, the energy gap ($E_g$) between the valence band and conduction band is generally:

(a) Exactly 0 eV

(b) Less than 1 eV

(d) Greater than 3 eV

(MCQ) The standard energy gap ($E_g$) for pure Silicon at room temperature is approximately:

(a) $0.72$ eV

(b) $1.1$ eV

(d) $0.01$ eV

AI Image Prompt: A clean, high-quality, mathematically correct landscape diagram showing the energy band classification of Insulators, Semiconductors, and Conductors side-by-side. The Conduction Band (CB), Valence Band (VB), and Energy Gap (Eg) should be clearly labeled with representative Eg values. The background of the whole image should be fully white.

Filename: Level0_Q4_Energy_Bands_Classification.png

(Fill in the blank) In good electrical conductors (metals), the valence band and conduction band physically ____________ each other.

(Fill in the blank) At absolute zero ($0 \text{ K}$), an intrinsic semiconductor behaves exactly like a perfect ____________.

(True/False) The electrical resistivity of a semiconductor decreases exponentially as the temperature increases.

(True/False) Electrons present in the conduction band are entirely responsible for electrical conductivity in a metal.

(One Word) Name the energy gap that represents the minimum energy required to break a covalent bond in a crystal lattice.

10.

(Formula) Write the simple relation between electrical conductivity ($\sigma$) and electrical resistivity ($\rho$).

Topic 14.2: Types of Semiconductors (Intrinsic/Extrinsic)

11.

(MCQ) In an intrinsic (pure) semiconductor, the number density of electrons ($n_e$) and holes ($n_h$) obey:

(a) $n_e \gg n_h$

(b) $n_e \ll n_h$

(d) $n_e + n_h = 0$

12.

(MCQ) Doping a Silicon crystal with a Pentavalent impurity (like Phosphorus) produces an:

(a) n-type semiconductor

(b) p-type semiconductor

(d) Insulator

13.

AI Image Prompt: A clean, high-quality, mathematically correct landscape diagram showing the 2D crystal lattice of Silicon doped with a Pentavalent impurity atom (e.g., Phosphorus). Show the four covalent bonds and the fifth loosely bound "free electron". The background of the whole image should be fully white.

Filename: Level0_Q13_N_Type_Doping_Lattice.png

14.

(Fill in the blank) The process of deliberately adding desirable impurities to an intrinsic semiconductor to increase its conductivity is called ____________.

15.

(Fill in the blank) In a $p$-type semiconductor, the majority charge carriers are ____________ and minority carriers are ____________.

16.

(True/False) An $n$-type semiconductor has a net negative electrical charge.

17.

(True/False) Trivalent impurities like Boron or Aluminum create "holes" in the semiconductor lattice.

18.

(Match the following A to D with 1 to 4)

A. Acceptor Impurity	1. Free electrons
B. Donor Impurity	2. Intrinsic carrier concentration
C. $n_e \approx N_D$	3. Boron, Indium
D. $n_e = n_h = n_i$	4. Phosphorus, Arsenic

19.

(One Word) Where does the discrete "donor energy level" lie in the energy band diagram of an $n$-type semiconductor? (Just below the ____________ band).

20.

(Formula) State the Mass Action Law formula relating electron concentration ($n_e$), hole concentration ($n_h$), and intrinsic concentration ($n_i$) in thermal equilibrium.

Topic 14.3: p-n Junction Formation & Barrier Potential

21.

(MCQ) The narrow, charge-free region formed precisely at the p-n junction boundary is called the:

(a) Recombination zone

(b) Conduction band

(d) Intrinsic layer

22.

(MCQ) The formation of the depletion region is primarily due to the macroscopic ____________ of majority charge carriers across the junction.

(a) Drifting

(b) Diffusion

(d) Radiation

23.

AI Image Prompt: A clean, high-quality, mathematically correct landscape diagram of a p-n junction diode. It must clearly label the p-side, n-side, the central Depletion Layer containing immobile positive and negative ions, and the built-in electric field (E) pointing from n to p. The background of the whole image should be fully white.

Filename: Level0_Q23_PN_Junction_Depletion.png

24.

(Fill in the blank) The uncompensated positive and negative ions in the depletion layer create a fictitious internal potential called the ____________ potential.

25.

(Fill in the blank) For a silicon p-n junction, the barrier potential at room temperature is approximately ____________ Volts.

26.

(True/False) Inside the depletion region, there are essentially zero mobile charge carriers (electrons or holes).

27.

(True/False) At thermal equilibrium in an open-circuited p-n junction, the net current is zero because diffusion current exactly cancels the drift current.

28.

(One Word) In a p-n junction, the internally generated electric field points from the $n$-region towards the ____________ region.

29.

(One Word) The motion of minority carriers swept across the junction by the internal electric field is specifically called ____________ current.

30.

(Formula) Write the formula for the net current ($I_{net}$) in an open-circuited p-n junction in terms of $I_{drift}$ and $I_{diffusion}$.

Topic 14.4: Diode Applications (Biasing & Rectifiers)

31.

(MCQ) A p-n junction diode is said to be forward biased when the:

(a) p-side is connected to negative terminal

(b) n-side is connected to positive terminal

(d) both sides are grounded

32.

(MCQ) Applying a reverse bias to a p-n junction diode fundamentally causes the depletion layer to:

(a) Become narrower

(b) Remain unchanged

(d) Become wider

33.

AI Image Prompt: A clean, high-quality, mathematically correct landscape graph showing the Forward and Reverse V-I characteristics of a typical p-n junction diode. Label the Forward Current (mA), Reverse Current (uA), Knee Voltage, and Breakdown Voltage clearly. The background of the whole image should be fully white.

Filename: Level0_Q33_Diode_VI_Characteristics.png

34.

(Fill in the blank) The primary application of a diode, converting alternating current (AC) to direct current (DC), is called ____________.

35.

(Fill in the blank) A ____________-wave rectifier uses only a single diode and rectifies only half of the input AC cycle.

36.

(True/False) An ideal diode acts essentially as a short circuit (zero resistance) when forward biased.

37.

(True/False) The fundamental ripple frequency of the output of a Full-Wave Rectifier is equal to the input AC frequency ($f_{in}$).

38.

AI Image Prompt: A clean, high-quality, mathematically correct landscape circuit diagram of a Full-Wave Rectifier using a center-tapped transformer and two diodes (D1, D2). Show the load resistor (Rl) and the AC input/DC output waveforms adjacent to it. The background of the whole image should be fully white.

Filename: Level0_Q38_Full_Wave_Rectifier_Circuit.png

39.

(One Word) In the reverse bias V-I characteristic graph, the tiny, almost constant current is due to minority carriers. What is this current called? (Reverse ____________ current).

40.

(One Word) What component (e.g., a capacitor) is placed parallel to the load resistance in a rectifier circuit to smooth out the pulsating DC ripples?

Topic 14.5: Logic Gates (Mains Focus)

41.

(MCQ) The standard Boolean expression for a two-input AND gate is:

(a) $Y = A + B$

(b) $Y = A \cdot B$

(d) $Y = \overline{A + B}$

42.

(MCQ) Which of the following logic gates is universally known as a "Universal Gate"?

(a) AND gate

(b) OR gate

(d) NAND gate

43.

AI Image Prompt: A clean, high-quality, mathematically correct landscape diagram showing the standard logic symbols for the five basic gates: AND, OR, NOT, NAND, NOR. Label them clearly. The background of the whole image should be fully white.

Filename: Level0_Q43_Logic_Gate_Symbols.png

44.

(Fill in the blank) The basic logic gate that performs digital inversion (giving 0 for 1, and 1 for 0) is logically called an ____________.

45.

(Fill in the blank) The output of a NOR gate is exactly equivalent to an OR gate followed directly by a ____________ gate.

46.

(True/False) The Boolean expression for an OR gate is mathematically represented as $Y = A \cdot B$.

47.

(True/False) For a two-input NAND gate, the output is exactly 0 *only* when both inputs A and B are strictly 1.

48.

(Match the following Truth Table Outputs for inputs A=0, B=0)

A. Output of AND gate	1. $Y = 1$
B. Output of OR gate	2. $Y = 1$
C. Output of NAND gate	3. $Y = 0$
D. Output of NOR gate	4. $Y = 0$

49.

(One Word) Which standard gate gives an output of 1 if *any one or both* of its inputs are 1?

50.

(Formula) State the Boolean algebraic theorem known as De Morgan's First Theorem relating to NOR and AND logic: $\overline{A + B} = $ ____________.

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